Surrogating circuit design solutions with robustness metrics
作者: Jin SunLiang XiaoJiangshan TianHe ZhouJanet Roveda
作者单位: 1School of Computer Science and Engineering, Nanjing University of Science and Technology, No. 200 Xiaolingwei Street, Nanjing 210094, China
2Department of Electrical and Computer Engineering, The University of Arizona, 1230 E. Speedway Blvd., Tucson 85721, USA
刊名: Integration, the VLSI Journal, 2016, Vol.52 , pp.1-9
来源数据库: Elsevier Journal
DOI: 10.1016/j.vlsi.2015.07.015
关键词: Robust designRobustness metricElasticR methodSurrogatesProcess variations
原始语种摘要: Abstract(#br)With the increase in device variability, the performance uncertainty poses a daunting challenge to analog/mixed-signal circuit design. This situation requires a robust design approach to add large margins to the circuit and system-level specification to ensure correct operation and the overall yield. In this paper, we propose a new robust design approach by using norm metrics to quantify the robustness for both design parameters and performance uncertainty. In addition, we adopt a surrogating procedure to achieve robustness in design space and to reduce uncertainty in performance space. The end result of the proposed method is a Pareto-surface that provides the designer with trade-offs between design robustness and performance uncertainty. One advantage of this new approach...
全文获取路径: Elsevier  (合作)
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影响因子:0.414 (2012)

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