FPGA Design of MAC Protocol Based on Exhaustive Service Polling Mechanism
基于完全服务轮询机制MAC协议的FPGA设计
作者: 赖裕平马秀刘龙军丁洪伟李超
作者单位: 1北方工业大学计算机学院,北京
2云南大学通信工程系,云南 昆明
刊名: Computer Science and Application, 2018, Vol.08 (05), pp.748-756
中文刊名: 计算机科学与应用, 2018, Vol.08 (05), pp.748-756
来源数据库: Hans Pubs Journal
DOI: 10.12677/CSA.2018.85083
英文摘要: MAC protocol is a direct link between physical and network layer, which is one of the key protocols to ensure high efficient communication. According to the characteristics of polling system, this pa-per presents a FPGA design of MAC protocol based on exhaustive service polling mechanism. The design makes full use of the characteristics of flexibility and reconfigurability of FPGA. The method of combination of the hardware circuit description language Verilog HDL and the principle diagram is adopted, using Quartus II 8.0 to carry on the synthesis and routing, testing in the DE2. The design has the characteristics of good real-time, high reliability, strong portability, and can effectively reduce the transmission delay, and improve the bus utilization. The system designed can be widely...
中文摘要: MAC协议是连接物理链路和网络层直接的纽带,是保证网络高效通信的关键协议之一。本文根据轮询系统的特性,提出了一种基于完全服务轮询机制MAC协议的FPGA设计。该设计充分利用FPGA的灵活性和可重构性的特点,采用硬件描述语言Verilog HDL和原理图相结合的方法,使用Quartus II 8.0进行综合和布线,在DE2开发板上进行测试。该设计具有实时性好、可靠性高、可移植性强等特点,能够有效减小传输时延,提高总线利用率。可广泛用于无线传感器网络、Ad Hoc网络、移动通信网络、物联网等领域。
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