Analysis and hardware testing of cell capacitor discharge currents during DC faults in half-bridge modular multilevel converters
作者: A.A. AboushadyK.H. AhmedD. Jovcic
论文集英文名称: 11th IET International Conference on AC and DC Power Transmission
来源数据库: IET
DOI: 10.1049/cp.2015.0010
关键词: delayselectrical faultsovercurrent protectionpower convertorssemiconductor switches
原始语种摘要: This paper focuses on the behaviour of the cell capacitor discharge currents during DC faults in half-bridge modular multilevel converters. Active switches, not designed for fault conditions, are tripped to minimize discharge currents effect on the semiconductor switches. Two levels of device protection are commonly in place; driver level protection monitoring collector-emitter voltage and overcurrent protection with feedback measurement and control. However, unavoidable tripping delay times, arising from factors such as sensor lags, controller sampling delays and hardware propagation delays, impact transient current shape and hence affect the selection of semiconductor device ratings as well as arm inductance. Analytical expressions are obtained for current slew rate, peak transient...
全文获取路径: IET  (合作)
分享到:

×
关键词翻译
关键词翻译
  • capacitor 电容器
  • discharge 
  • modular 模的
  • semiconductor 半导体
  • multilevel 多级
  • hardware 硬件
  • bridge 电桥
  • apparatus 仪器频
  • device 装置
  • testing 测试